1. Field of the Invention
The present invention discloses a method of backside metal process for semiconductor chips, particularly of using a copper layer as a backside metal layer and coating an oxidation preventing layer to protect the copper layer against oxidation.
2. Background of the Invention
Heterojunction Bipolar Transistors (HBTs) as well as High-Electron Mobility Transistors and (HEMTs) are important semiconductor electronic devices for a variety of applications, such as microwave, millimeter wave, and optoelectronic applications. For advanced multifunction devices, which include more than one device type on a common substrate, it is important to consider not only the die size and cost reduction, but also the performance of the integrated circuits with additional functionality. To achieve this goal, much effort has been made on the development of reliable fabrication processes of monolithic integrated devices for volume productions.
Backside metal process is one of the key process steps for the fabrication of integrated semiconductor devices. Regardless of device types and functionalities, it is necessary to provide grounding for those transistors fabricated on the front surface of a semiconductor wafer. Therefore, ground pads were usually disposed either in the vicinity of, or at a distance from, those front-side devices, depending on the surface device layout. In general, for a space saving purpose, a common ground pad is usually shared by many transistors. FIG. 1 is a cross-sectional view of a substrate formed by a semiconductor wafer 100 with ground pads formed thereon. The ground pad consists of a surface metal layer 101, a backside via hole 102 and a backside metal layer 103, which contacts electrically to the surface metal layer 101 through the backside via hole 102. Conventionally, electronic devices, such as HBTs and HEMTs, are first fabricated on the front surface. A surface metal layer is then deposited to define ground pad areas. The substrate is usually mechanically thinned to a certain thickness, in order to facilitate subsequent fabrication processes for backside via holes 102. The positions, sizes and shapes of backside via holes 102 are then defined on the wafer backside using the conventional lithography technique, and followed by either dry or wet chemical etchings to create via holes through the wafer to the surface metal layer 101. Finally, a backside metal layer 103 is deposited on the wafer backside, by which a good electrical contact to the surface metal layer 101 via the backside via holes 102 can be achieved. It is worth to mentioned that since the surface metal layer 101 of the ground pad is contacted not only electrically but also thermally to the whole backside metal layer 103 through the via hole 102, the ground pad can also acts as a heat sink for the front side devices.
Conventionally, the backside metal processes for GaAs based integrated devices usually utilize a sputter to coat a metal seed layer on the rear surface and the backside via holes. However, by using the conventional method, it is difficult to form a thin metal seed layer with good uniformity and free of defect, and thereby hard to provide good adhesion for backside metals (such as Au, Al or Cu, etc.) on the rear surface, and particularly on the inner sidewalls of via holes. This situation will become even worse for via holes with very large aspect ratio. As a consequence, the backside metal layer becomes easily to be peeled off from the surface metal layer after subsequent fabrication processes, leading to poor device grounding and hence degradations in device performance, reliability and overall yield.
The material of the backside metal itself is also an important consideration. For GaAs-based integrated devices, the most commonly used backside metal is gold. Recently, semiconductor manufacturers have begun using copper as backside metal, because of its lower resistivity and manufacture costs. However, a drawback of using copper as a backside metal is that Cu atoms can easily diffuse into the GaAs substrate, which can even reach the active area of front-side devices, leading to device damages.
Therefore, it is necessary to develop a method of backside metal process for semiconductor electronic devices, which not only improves the adhesion between the front side metal layer and the backside metal layer through backside via holes, but also prevents metallic atoms of the backside metal diffusing into the active area of front surface devices. In addition, another important issue of using copper instead of gold as backside metal layer is that copper is easily oxidized, so that coating an oxidation preventing layer on the copper layer is necessary. However, after wafer sawing into dies, the copper layer can still be oxidized from die edges. Therefore, developing a suitable process to prevent the copper layer from oxidization after wafer sawing is also important.